Hardware synthesis of arithmetic operations

Contents:

• pptrees package
  • ExpressionNode submodule
  • ExpressionGraph submodule
  • ExpressionTree submodule
  • ExpressionForest submodule
  • AdderTree submodule
  • AdderForest submodule
  • util submodule
• Tutorial
  • Trees [structures that generate one bit of the result]
  • Forests [structures that generate the entire result]
• Theory and Discussion
  • Brief theory of addition
  • Traditional hardware addition
  • Revised hardware addition
  • Adder-specific optimizations [Sparseness]
  • Adder-specific optimizations [Factorization]
  • Sample traversal through the space of binary trees
  • Logical synthesis of general hardware operations
  • Possible expansion: addition-based comparator
  • Possible expansion: non addition-based comparator
  • Possible expansion: adding a constant value

• Index

• Module Index